LAN9420 Datasheet, PDF (108/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

4.3.4
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Receive List Base Address Register (RX_BASE_ADDR)
Offset:
000Ch
Size:
32 bits
This register specifies the start address of the receive buffer list. RX_BASE_ADDR must be 4-DWORD
(16 byte) aligned (e.g. Reserved address bits 3:0 must be 0).
BITS
31:4
3:0
DESCRIPTION
Start of Receive List (SRL)
This field points to the start of the receive buffer descriptor list. The
descriptor list resides in the Host memory. Writing this register is only valid
when the RX DMA engine is in the stopped state. When stopped, this
register must be written before the START command is given.
RESERVED
TYPE
R/W
RO
DEFAULT
28‘h0
-
Revision 1.6 (07-18-11)
108
DATASHEET
SMSC LAN9420/LAN9420i