LAN9420 Datasheet, PDF (129/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
4.4.7 MII Data Register (MII_DATA)
Offset:
0098h
Size:
32 bits
This register contains either the data to be written to the PHY register specified in the MII Access
Register, or the read data from the PHY register whose index is specified in the MII Access Register.
Refer toSection 4.4.6, "MII Access Register (MII_ACCESS)," on page 128 for further details.
Note: The MIIBZY bit in the MII_ACCESS register must be cleared when writing to this register.
BITS
DESCRIPTION
31-16 RESERVED
15-0
MII Data
This contains the 16-bit value read from the PHY read operation or the 16-
bit data value to be written to the PHY before an MII write operation.
TYPE
RO
R/W
DEFAULT
-
0000h
SMSC LAN9420/LAN9420i
129
DATASHEET
Revision 1.6 (07-18-11)