LAN9420 Datasheet, PDF (109/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
4.3.5 Transmit List Base Address Register (TX_BASE_ADDR)
Offset:
0010h
Size:
32 bits
This register specifies the start address of the transmit buffer list. TX_BASE_ADDR must be 4-DWORD
(16 byte) aligned (e.g. Reserved address bits 3:0 must be 0).
BITS
31:4
3:0
DESCRIPTION
Start of Transmit List (STL)
This field points to the start of the transmit buffer descriptor list. The
descriptor list resides in the Host memory. Writing this register is only valid
when the TX DMA engine is in the stopped state. When stopped, this
register must be written before the START command is given.
RESERVED
TYPE
R/W
RO
DEFAULT
28‘h0
-
SMSC LAN9420/LAN9420i
109
DATASHEET
Revision 1.6 (07-18-11)