LAN9420 Datasheet, PDF (59/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
BITS
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Table 3.17 Filter i Offset Bit Definitions
FILTER i OFFSET DESCRIPTION
DESCRIPTION
Pattern Offset: The offset of the first byte in the frame on which CRC is checked for wakeup frame
recognition. The MAC checks the first offset byte of the frame for CRC and checks to determine
whether the frame is a wakeup frame. Offset 0 is the first byte of the incoming frame's destination
address.
The Filter i CRC-16 register contains the CRC-16 result of the frame that should pass Filter i.
Table 3.18 describes the Filter i CRC-16 bit fields.
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Table 3.18 Filter i CRC-16 Bit Definitions
FILTER i CRC-16 DESCRIPTION
DESCRIPTION
Pattern CRC-16: This field contains the 16-bit CRC value from the pattern and the byte mask
programmed to the wakeup filter register function. This value is compared against the CRC
calculated on the incoming frame, and a match indicates the reception of a wakeup frame.
Table 3.19 indicates the cases that produce a wake when the Wakeup Frame Enable (WAKE_EN) bit
of the Wakeup Control and Status Register (WUCSR) is set. All other cases do not generate a wake.
Table 3.19 Wakeup Generation Cases
FILTER
ENABLED
(Note 3.2)
Yes
Yes
Yes
Yes
CRC
MATCH
(Note 3.3)
Yes
Yes
Yes
Yes
GLOBAL
UNICAST
ENABLED
(Note 3.4)
PASS
REGULAR
RECEIVE
FILTER
ADDRESS
TYPE
(Note 3.5)
x
x
x
Yes
x
x
x
Yes
Multicast
(=1)
x
Yes
Unicast
(=0)
BROAD-
CAST
FRAME
Yes
No
No
No
Note 3.2 As determined by bit 0 of Filter i Command.
Note 3.3 CRC matches Filter i CRC-16 field.
Note 3.4 As determined by bit 9 of WUCSR.
Note 3.5 As determined by bit 2 of Filter i Command.
Note: x indicates “don’t care”.
MULTI-
CAST
FRAME
No
No
Yes
UNICAST
FRAME
No
Yes
No
No
Yes
SMSC LAN9420/LAN9420i
59
DATASHEET
Revision 1.6 (07-18-11)