LAN9420 Datasheet, PDF (58/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Note 3.1 Wakeup frame detection can be performed when LAN9420/LAN9420i is in any power
state. Wakeup frame detection is enabled when the WUEN bit is set.
Note: When wake-up frame detection is enabled via the WUEN bit of the Wakeup Control and Status
Register (WUCSR), a broadcast wake-up frame will wake-up the device despite the state of
the Disable Broadcast (BCAST) bit in the MAC Control Register (MAC_CR).
Table 3.14 Wakeup Frame Filter Register Structure
Filter 0 Byte Mask
Filter 1 Byte Mask
Filter 2 Byte Mask
Filter 3 Byte Mask
Reserved
Filter 3
Command
Reserved
Filter 2
Command
Reserved
Filter 1
Command
Reserved
Filter 0
Command
Filter 3 Offset
Filter 2 Offset
Filter 1Offset
Filter 0 Offset
Filter 1 CRC-16
Filter 0 CRC-16
Filter 3 CRC-16
Filter 2 CRC-16
The Filter i Byte Mask defines which incoming frame bytes Filter i will examine to determine whether
or not this is a wakeup frame. Table 3.15, describes the byte mask’s bit fields.
BITS
31
30:0
Table 3.15 Filter i Byte Mask Bit Definitions
FILTER i BYTE MASK DESCRIPTION
DESCRIPTION
RESERVED
Byte Mask: If bit j of the byte mask is set, the CRC machine processes byte pattern-offset + j of
the incoming frame. Otherwise, byte pattern-offset + j is ignored.
The Filter i command register controls Filter i operation. Table 3.16 shows the Filter I command
register.
BITS
3
2:1
0
Table 3.16 Filter i Command Bit Definitions
FILTER i COMMANDS
DESCRIPTION
Address Type: Defines the destination address type of the pattern. When bit is set, the pattern
applies only to multicast frames. When bit is cleared, the pattern applies only to unicast frames.
RESERVED
Enable Filter: When bit is set, Filter i is enabled, otherwise, Filter i is disabled.
The Filter i Offset register defines the offset in the frame’s destination address field from which the
frames are examined by Filter i. Table 3.17 describes the Filter i Offset bit fields.
Revision 1.6 (07-18-11)
58
DATASHEET
SMSC LAN9420/LAN9420i