LAN9420 Datasheet, PDF (33/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
If the EEPROM operation is the “read location” (READ) operation, the Host must issue the READ
command using the E2P_CMD register with the EPC_ADDR set to the desired location. The command
is executed when the Host sets the EPC_BSY bit high. The completion of the operation is indicated
when the EPC_BSY bit is cleared, at which time the data from the EEPROM may be read from the
E2P_DATA register.
Other EEPROM operations are performed by writing the appropriate command to the E2P_CMD
register. The command is executed when the Host sets the EPC_BSY bit high. The completion of the
operation is indicated when the EPC_BSY bit is cleared. In all cases, the Host must wait for EPC_BSY
to clear before modifying the E2P_CMD register.
Note: The EEPROM device powers-up in the erase/write disabled state. To modify the contents of
the EEPROM, the Host must first issue the EWEN command.
If an operation is attempted, and an EEPROM device does not respond within 30mS,
LAN9420/LAN9420i will timeout, and the EPC Time-out bit (EPC_TO) in the E2P_CMD register will be
set.
Figure 3.7 illustrates the Host accesses required to perform an EEPROM Read or Write operation.
EEPROM Write
Idle
EEPROM Read
Idle
Write Data
Register
Write
Command
Register
Write
Command
Register
Busy Bit = 0
Read
Command
Register
Read
Command
Register
Busy Bit = 0
Read Data
Register
Figure 3.7 EEPROM Access Flow Diagram
The Host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
SMSC LAN9420/LAN9420i
33
DATASHEET
Revision 1.6 (07-18-11)