LAN9420 Datasheet, PDF (34/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
3.3.5.3.1
SUPPORTED EEPROM OPERATIONS
The EEPROM controller supports the following EEPROM operations under Host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in Section 4.2.11, "EEPROM Command Register (E2P_CMD)," on
page 100 for E2P_CMD field settings for each command.
ERASE (Erase Location): If erase/write operations are enabled in the EEPROM, this command will
erase the location selected by the EPC Address field (EPC_ADDR). The EPC_TO bit is set if the
EEPROM does not respond within 30ms.
EECS
EECLK
EEDIO (OUTPUT)
EEDIO (INPUT)
tCSL
1
1
1
A6
A0
Figure 3.8 EEPROM ERASE Cycle
ERAL (Erase All): If erase/write operations are enabled in the EEPROM, this command will initiate a
bulk erase of the entire EEPROM.The EPC_TO bit is set if the EEPROM does not respond within
30ms.
EECS
EECLK
EEDIO (OUTPUT)
EEDIO (INPUT)
tCSL
1
0
0
1
0
Figure 3.9 EEPROM ERAL Cycle
Revision 1.6 (07-18-11)
34
DATASHEET
SMSC LAN9420/LAN9420i