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LAN9420 Datasheet, PDF (65/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface | |||
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Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
 Energy detect
 Duplex, link activity and speed indicator LEDs
 Minimal external components are required for the utilization of the integrated PHY
Functionally, the PHY can be divided into the following sections:
 100BASE-TX transmit and receive
 10BASE-T transmit and receive
 Internal MII interface to the Ethernet Media Access Controller (MAC)
 Auto-negotiation to automatically determine the best speed and duplex possible
 Management Control to read status registers and write control registers
MAC
TX_CLK
100M
PLL
Internal
MII 25 MHz by 4 bits
MII
25MHz 4B/5B 25MHz by Scrambler
by 4 bits Encoder 5 bits and PISO
NRZI
Converter
NRZI
125 Mbps Serial
MLT-3
Tx
Converter MLT-3 Driver
MLT-3
MLT-3 Magnetics
3.6.1
3.6.1.1
RJ45
MLT-3
CAT-5
Figure 3.25 100BASE-TX Data Path
100BASE-TX Transmit
The data path of the 100BASE-TX is shown in Figure 3.25. Each major block is explained below.
4B/5B Encoding
The transmit data passes from the MII block to the 4B/5B encoder. This block encodes the data from
4-bit nibbles to 5-bit symbols (known as âcode-groupsâ) according to Table 3.21. Each 4-bit data-nibble
is mapped to 16 of the 32 possible code-groups. The remaining 16 code-groups are either used for
control information or are not valid.
The first 16 code-groups are referred to by the hexadecimal values of their corresponding data nibbles,
0 through F. The remaining code-groups are given letter designations with slashes on either side. For
example, an IDLE code-group is /I/, a transmit error code-group is /H/, etc.
The encoding process may be bypassed by clearing bit 6 of register 31. When the encoding is
bypassed, the 5th transmit data bit is equivalent to TX_ER.
SMSC LAN9420/LAN9420i
65
DATASHEET
Revision 1.6 (07-18-11)
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