LAN9420 Datasheet, PDF(152/171 Page) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

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LAN9420 Datasheet, PDF (152/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

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4.6.1

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Datasheet

PCI Power Management Capabilities Register (PCI_PMC)

Offset:

78h

Size:

32 bits

This register implements the standard capability structure used to define power management features

in a PCI device. The capabilities structure is documented in the PCI Bus Power Management Interface

Specification Revision 1.1. The host uses this register check supported power states and features.

Note: The format of this register is equivalent to offsets 3:0 of the Power Management Register Block

Definition as described in the PCI Bus Power Management Interface Specification Revision 1.1.

BITS

DESCRIPTION

24:22

PME Support from D3COLD (PME_IN_D3C)

When this bit is set, LAN9420/LAN9420i is capable asserting nPME from the

D3COLD state. When this bit is cleared, the device will not assert nPME from

the D3COLD state.

This bit reflects the setting of the VAUXDET input pin.

PME Support from D3HOT (PME_IN_D3H)

This bit is set indicating that LAN9420/LAN9420i is capable asserting nPME

from the D3HOT state.

PME Support from D2 (PME_IN_D2)

This bit is cleared since LAN9420/LAN9420i does not support the D2 power

management state.

PME Support from D1 (PME_IN_D1)

This bit is cleared since LAN9420/LAN9420i does not support the D1 power

management state.

PME Support from D0 (PME_IN_D0)

This bit is set indicating that LAN9420/LAN9420i is capable asserting nPME

from the D0 state.

D2 Power State Support (D2_SUP)

This bit is cleared since LAN9420/LAN9420i does not support the D2 power

management state.

D1 Power State Support (D1_SUP)

This bit is cleared since LAN9420/LAN9420i does not support the D1 power

management state.

3.3Vaux Power Supply Current Draw (AUX_CURRENT)

This field indicates the auxiliary power requirements for the

LAN9420/LAN9420i device. This field is dependant on the state of the

VAUXDET input pin.

When VAUXDET is cleared, this field is cleared to 000b to indicate that there

is no current draw from the 3.3Vaux power supply. When VAUXDET is set,

this field is set to a value of 110b to indicate a current draw of 320mA from

the 3.3Vaux power supply.

Device Specific Initialization (DSI)

This bit returns zero, indicating that there are no device specific initialization

requirements.

RESERVED

PME Clock (CLK4PME)

This bit is cleared to indicate that LAN9420/LAN9420i does not require the

presence of PCICLK in order to assert nPME.

TYPE

DEFAULT

Note 4.10

Revision 1.6 (07-18-11)

152

DATASHEET

SMSC LAN9420/LAN9420i

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