LAN9420 Datasheet, PDF (171/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface

Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Table 7.1 Customer Revision History (continued)
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY
CORRECTION
Section 3.5.4, "Wakeup
Frame Detection," on
page 57, Section 4.4.1,
"MAC Control Register
(MAC_CR)," on page 120
Section 4.4.12, "Wakeup
Control and Status Register
(WUCSR)," on page 134
Section 5.9, "Clock Circuit,"
on page 167
Section 4.5.5, "Auto
Negotiation Advertisement,"
on page 141
Added note: “When wake-up frame detection is
enabled via the WUEN bit of the Wakeup Control
and Status Register (WUCSR), a broadcast wake-
up frame will wake-up the device despite the state
of the Disable Broadcast (BCAST) bit in the MAC
Control Register (MAC_CR). “
Corrected GUE bit description to state: “....A global
unicast frame has the MAC Address [0] bit set to
0.”
Updated Drive Level from 0.5mW to 300uW.
Fixed Pause Operation bit definitions to:
00 No PAUSE
01 Symmetric PAUSE
10 Asymmetric PAUSE
11 Advertise support for both symmetric PAUSE
and Asymmetric PAUSE
Added note stating: When both symmetric PAUSE
and asymmetric PAUSE support are advertised
(value of 11), the device will only be configured to,
at most, one of the two settings upon auto-
negotiation completion.
SMSC LAN9420/LAN9420i
171
DATASHEET
Revision 1.6 (07-18-11)