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LAN9420 Datasheet, PDF (56/171 Pages) SMSC Corporation – Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
3.5.3
Single-Chip Ethernet Controller with HP Auto-MDIX Support and PCI Interface
Datasheet
Address Filtering Functional Description
The Ethernet address fields of an Ethernet packet, consists of two 6-byte fields: one for the destination
address and one for the source address. The first bit of the destination address signifies whether it is
a physical address or a multicast address.
The address check logic filters the frame based on the Ethernet receive filter mode that has been
enabled. Filter modes are specified based on the state of the control bits in Table 3.13, "Address
Filtering Modes", which shows the various filtering modes used by the MAC. These bits are defined in
more detail in Section 4.4.1, "MAC Control Register (MAC_CR)," on page 120.
If the frame fails the filter, the MAC does not receive the packet. The Host has the option of accepting
or ignoring the packet.
MCPAS
0
0
0
0
X
1
1
PRMS
0
0
0
0
1
0
0
Table 3.13 Address Filtering Modes
INVFILT
0
0
0
1
0
0
0
HFILT
0
0
1
0
X
0
1
HPFILT
0
1
1
0
X
X
1
DESCRIPTION
MAC address perfect filtering only
for all addresses.
MAC address perfect filtering for
physical address and hash filtering
for multicast addresses
Hash Filtering for physical and
multicast addresses
Inverse Filtering
Promiscuous
Pass all multicast frames. Frames
with physical addresses are
perfect-filtered
Pass all multicast frames. Frames
with physical addresses are hash-
filtered
3.5.3.1
3.5.3.2
Perfect Filtering
This filtering mode passes only incoming frames whose destination address field exactly matches the
value programmed into the MAC address high register (refer to Section 4.4.2, "MAC Address High
Register (ADDRH)," on page 124) and the MAC address low register (refer to Section 4.4.3, "MAC
Address Low Register (ADDRL)," on page 125). The MAC address is formed by the concatenation of
the above two registers in the MCSR.
Hash Only Filtering Mode
This type of filtering checks for incoming receive packets with either multicast or physical destination
addresses, and executes an imperfect address filtering against the hash table.
During imperfect hash filtering, the destination address in the incoming frame is passed through the
CRC logic and the upper six bits of the CRC register are used to index the contents of the hash table.
The hash table is formed by concatenating the register’s multicast hash table high (refer to Section
4.4.4, "Multicast Hash Table High Register (HASHH)," on page 126) and multicast hash table low (refer
to Section 4.4.5, "Multicast Hash Table Low Register (HASHL)," on page 127) in the MCSR to form a
64-bit hash table. The most significant bit of the CRC determines the register to be used (High/Low),
while the other five bits determine the bit within the register. A value of 00000 selects Bit 0 of the
Revision 1.6 (07-18-11)
56
DATASHEET
SMSC LAN9420/LAN9420i