C8051F70X_0910 Datasheet, PDF (8/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
List of Figures
1. System Overview
Figure 1.1. C8051F700/1 Block Diagram ................................................................ 18
Figure 1.2. C8051F702/3 Block Diagram ................................................................ 19
Figure 1.3. C8051F704/5 Block Diagram ................................................................ 20
Figure 1.4. C8051F706/07 Block Diagram .............................................................. 21
Figure 1.5. C8051F708/09/10/11 Block Diagram .................................................... 22
Figure 1.6. C8051F712/13/14/15 Block Diagram .................................................... 23
2. Ordering Information
3. Pin Definitions
Figure 3.1. C8051F7xx-GM TQFP64 Pinout Diagram (Top View) .......................... 30
Figure 3.2. C8051F7xx-GQ QFP48 Pinout Diagram (Top View) ............................. 31
Figure 3.3. C8051F7xx-GQ QFN48 Pinout Diagram (Top View) ............................ 32
4. TQFP-64 Package Specifications
Figure 4.1. TQFP-64 Package Drawing .................................................................. 33
Figure 4.2. TQFP-64 PCB Land Pattern .................................................................. 34
5. TQFP-48 Package Specifications
Figure 5.1. TQFP-48 Package Drawing .................................................................. 35
Figure 5.2. TQFP-48 PCB Land Pattern .................................................................. 36
6. QFN-48 Package Specifications
Figure 6.1. QFN-48 Package Drawing .................................................................... 37
Figure 6.2. QFN-48 PCB Land Pattern .................................................................... 38
7. Electrical Characteristics
8. 10-Bit ADC (ADC0, C8051F700/2/4/6/8 and C8051F710/2/4 only)
Figure 8.1. ADC0 Functional Block Diagram ........................................................... 46
Figure 8.2. 10-Bit ADC Track and Conversion Example Timing ............................. 48
Figure 8.3. ADC0 Equivalent Input Circuits ............................................................. 49
Figure 8.4. ADC Window Compare Example: Right-Justified Data ......................... 55
Figure 8.5. ADC Window Compare Example: Left-Justified Data ........................... 55
Figure 8.6. ADC0 Multiplexer Block Diagram .......................................................... 56
9. Temperature Sensor (C8051F700/2/4/6/8 and C8051F710/2/4 only)
Figure 9.1. Temperature Sensor Transfer Function ................................................ 58
Figure 9.2. Temperature Sensor Error with 1-Point Calibration at 0 Celsius ........... 59
10. Voltage and Ground Reference Options
Figure 10.1. Voltage Reference Functional Block Diagram ..................................... 60
11. Voltage Regulator (REG0)
12. Comparator0
Figure 12.1. Comparator0 Functional Block Diagram ............................................. 65
Figure 12.2. Comparator Hysteresis Plot ................................................................ 66
Figure 12.3. Comparator Input Multiplexer Block Diagram ...................................... 70
13. Capacitive Sense (CS0)
Figure 13.1. CS0 Block Diagram ............................................................................. 72
Figure 13.2. Auto-Scan Example ............................................................................. 74
Figure 13.3. CS0 Multiplexer Block Diagram ........................................................... 81
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Rev. 0.3