C8051F70X_0910 Datasheet, PDF (117/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
SFR Definition 18.1. SFRPAGE: SFR Page
Bit
7
6
5
4
3
2
1
0
Name
SFRPAGE[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xA7; SFR Page = All Pages
Bit
Name
Description
7:0 SFRPAGE[7:0] SFR Page Bits.
Represents the SFR Page the C8051 core uses when reading or modifying SFRs.
Write: Sets the SFR Page.
Read: Byte is the SFR page the C8051 core is using.
Table 18.2. Special Function Registers
SFRs are listed in alphabetical order. All undefined SFR locations are reserved
Register
ACC
ADC0CF
ADC0CN
ADC0GTH
ADC0GTL
ADC0H
ADC0L
ADC0LTH
ADC0LTL
ADC0MX
B
CKCON
CLKSEL
CPT0CN
CPT0MD
CPT0MX
CRC0AUTO
CRC0CN
CRC0CNT
Address
0xE0
0xBC
0xE8
0xC4
0xC3
0xBE
0xBD
0xC6
0xC5
0xBB
0xF0
0x8E
0xBD
0x9B
0x9D
0x9F
0x96
0x91
0x97
Page
All Pages
F
All Pages
0
0
0
0
0
0
0
All Pages
All Pages
F
0
0
0
F
F
F
Accumulator
Description
ADC0 Configuration
ADC0 Control
ADC0 Greater-Than Compare High
ADC0 Greater-Than Compare Low
ADC0 High
ADC0 Low
ADC0 Less-Than Compare Word High
ADC0 Less-Than Compare Word Low
AMUX0 Multiplexer Channel Select
B Register
Clock Control
Clock Select
Comparator0 Control
Comparator0 Mode Selection
Comparator0 MUX Selection
CRC0 Automatic Control Register
CRC0 Control
CRC0 Automatic Flash Sector Count
Page
90
50
52
53
53
51
51
54
54
57
91
245
245
68
69
71
199
197
199
Rev. 0.3
117