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C8051F70X_0910 Datasheet, PDF (56/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F70x/71x
8.5. ADC0 Analog Multiplexer
ADC0 on the C8051F700/2/4/6/8 and C8051F710/2/4 uses an analog input multiplexer to select the posi-
tive input to the ADC. Any of the following may be selected as the positive input: Port 0 or Port 1 I/O pins,
the on-chip temperature sensor, or the positive power supply (VDD). The ADC0 input channel is selected in
the ADC0MX register described in SFR Definition 8.9.
ADC0MX
P0.0
P1.7
Temp
Sensor
VREG Output
VDD
GND
AMUX
ADC0
Figure 8.6. ADC0 Multiplexer Block Diagram
Important Note About ADC0 Input Configuration: Port pins selected as ADC0 inputs should be config-
ured as analog inputs, and should be skipped by the Digital Crossbar. To configure a Port pin for analog
input, set the corresponding bit in register PnMDIN to 0. To force the Crossbar to skip a Port pin, set the
corresponding bit in register PnSKIP to 1. See Section “26. Port Input/Output” on page 165 for more Port
I/O configuration details.
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