C8051F70X_0910 Datasheet, PDF (276/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
Write to
PCA0CPLn
0
Reset
ENB
Write to
PCA0CPHn ^ENB
1
PCA0CPMn
PECCMT P E
WC A A A O W C
MO P P T G M C
1 MPN n n n F
6nnn
n
n
0 00x0 x
R/W when
ARSEL = 1
(Auto-Reload)
PCA0CPH:Ln
(right-justified)
R/W when
ARSEL = 0
(Capture/Compare)
PCA0CPH:Ln
(right-justified)
Enable _{N-bit Comparator}
PCA0PWM
A EC
CC
R CO
LL
SOV
SS
EVF
EE
L
LL
10
x
Set “N” bits:
01 = 9 bits
10 = 10 bits
11 = 11 bits
match _S SET _Q CEXn _Crossbar
R CLR Q
PCA Timebase
PCA0H:L
Overflow of N^th Bit
Figure 32.9. PCA 9, 10 and 11-Bit PWM Mode Diagram
Port I/O
276
Rev. 0.3