C8051F70X_0910 Datasheet, PDF (169/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
26.2.2. Assigning Port I/O Pins to Digital Functions
Any Port pins not assigned to analog functions may be assigned to digital functions or used as GPIO. Most
digital functions rely on the Crossbar for pin assignment; however, some digital functions bypass the
Crossbar in a manner similar to the analog functions listed above. Port pins used by these digital func-
tions and any Port pins selected for use as GPIO should have their corresponding bit in PnSKIP set
to 1. Table 26.2 shows all available digital functions and the potential mapping of Port I/O to each digital
function.
Table 26.2. Port I/O Assignment for Digital Functions
Digital Function
Potentially Assignable Port Pins
UART0, SPI0, SMBus, CP0, Any Port pin available for assignment by the
CP0A, SYSCLK, PCA0
Crossbar. This includes P0.0–P2.7 pins which
(CEX0-2 and ECI), T0 or T1. have their PnSKIP bit set to 0.
Note: The Crossbar will always assign UART0
pins to P0.4 and P0.5.
Any pin used for GPIO
P0.0–P6.5
External Memory Interface
P3.0–P6.2
SFR(s) used for
Assignment
XBR0, XBR1
P0SKIP, P1SKIP,
P2SKIP
EMI0CF
26.2.3. Assigning Port I/O Pins to External Event Trigger Functions
External event trigger functions can be used to trigger an interrupt or wake the device from a low power
mode when a transition occurs on a digital I/O pin. The event trigger functions do not require dedicated
pins and will function on both GPIO pins (PnSKIP = 1) and pins in use by the Crossbar (PnSKIP = 0).
External event trigger functions cannot be used on pins configured for analog I/O. Table 26.3 shows all
available external event trigger functions.
Table 26.3. Port I/O Assignment for External Event Trigger Functions
Event Trigger Function
External Interrupt 0
External Interrupt 1
Port Match
Potentially Assignable Port Pins
P0.0–P0.7
P0.0–P0.7
P0.0–P1.7
SFR(s) used for
Assignment
IT01CF
IT01CF
P0MASK, P0MAT
P1MASK, P1MAT
Rev. 0.3
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