C8051F70X_0910 Datasheet, PDF (112/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
Multiplexed Mode
Signal Name
RD
WR
ALE
D0/A0
D1/A1
D2/A2
D3/A3
D4/A4
D5/A5
D6/A6
D7/A7
A8
A9
A10
A11
A12
A13
A14
A15
—
—
—
—
—
—
—
Table 16.2. EMIF Pinout (C8051F70x/71x)
Port Pin
P6.1
P6.0
P6.2
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
—
—
—
—
—
—
—
Non Multiplexed Mode
Signal Name
Port Pin
RD
P6.1
WR
P6.0
D0
P5.0
D1
P5.1
D2
P5.2
D3
P5.3
D4
P5.4
D5
P5.5
D6
P5.6
D7
P5.7
A0
P4.0
A1
P4.1
A2
P4.2
A3
P4.3
A4
P4.4
A5
P4.5
A6
P4.6
A7
P4.7
A8
P3.0
A9
P3.1
A10
P3.2
A11
P3.3
A12
P3.4
A13
P3.5
A14
P3.6
A15
P3.7
112
Rev. 0.3