C8051F70X_0910 Datasheet, PDF (35/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

5. TQFP-48 Package Specifications
C8051F70x/71x
Figure 5.1. TQFP-48 Package Drawing
Table 5.1. TQFP-48 Package Dimensions
Dimension
A
A1
A2
b
c
D
D1
e
Min
Nom
Max
—
—
1.20
0.05
—
0.15
0.95
1.00
1.05
0.17
0.22
0.27
0.09
—
0.20
9.00 BSC.
7.00 BSC.
0.50 BSC.
Dimension
E
E1
L
aaa
bbb
ccc
ddd
Θ
Min
Nom
Max
9.00 BSC.
7.00 BSC.
0.45
0.60
0.75
0.20
0.20
0.08
0.08
0°
3.5°
7°
Notes:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing per ANSI Y14.5M-1994.
3. This drawing conforms to JEDEC outline MS-026, variation ABC.
4. Recommended card reflow profile is per the JEDEC/IPC J-STD-020 specification for Small Body
Components.
Rev. 0.3
35