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C8051F70X_0910 Datasheet, PDF (268/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family
C8051F70x/71x
32.2. PCA0 Interrupt Sources
Figure 32.3 shows a diagram of the PCA interrupt tree. There are eight independent event flags that can
be used to generate a PCA0 interrupt. They are: the main PCA counter overflow flag (CF), which is set
upon a 16-bit overflow of the PCA0 counter, an intermediate overflow flag (COVF), which can be set on an
overflow from the 8th, 9th, 10th, or 11th bit of the PCA0 counter, and the individual flags for each PCA
channel (CCF0, CCF1, and CCF2), which are set according to the operation mode of that module. These
event flags are always set when the trigger condition occurs. Each of these flags can be individually
selected to generate a PCA0 interrupt, using the corresponding interrupt enable flag (ECF for CF, ECOV
for COVF, and ECCFn for each CCFn). PCA0 interrupts must be globally enabled before any individual
interrupt sources are recognized by the processor. PCA0 interrupts are globally enabled by setting the EA
bit and the EPCA0 bit to logic 1.
(for n = 0 to 2)
PCA0CPMn
PECCMT P E
WC A A A O W C
MO P P T G M C
1 MPN n n n F
6nnn
n
n
PCA Counter/Timer 8, 9,
10 or 11-bit Overflow
PCA Counter/Timer 16-
bit Overflow
PCA Module 0
(CCF0)
PCA0CN
CC
CCC
FR
CCC
FFF
210
PCA0MD
C
CCCE
I
PPPC
D
SSSF
L
210
ECCF0
0
1
0
1
PCA Module 1
(CCF1)
ECCF1
0
1
PCA Module 2
(CCF2)
ECCF2
0
1
PCA0PWM
A CE
CC
ROC
LL
S VO
SS
EFV
EE
L
LL
10
Set 8, 9, 10, or 11 bit Operation
0
1
EPCA0
EA
0
1
Figure 32.3. PCA Interrupt Block Diagram
0 Interrupt
Priority
1
Decoder
32.3. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8 to 11-Bit Pulse Width Modulator, or 16-
Bit Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the
CIP-51 system controller. These registers are used to exchange data with a module and configure the
module's mode of operation. Table 32.2 summarizes the bit settings in the PCA0CPMn and PCA0PWM
registers used to select the PCA capture/compare module’s operating mode. All modules set to use 8, 9,
10, or 11-bit PWM mode must use the same cycle length (8-11 bits). Setting the ECCFn bit in a
PCA0CPMn register enables the module's CCFn interrupt.
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Rev. 0.3