C8051F70X_0910 Datasheet, PDF (184/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
SFR Definition 26.19. P2MDOUT: Port 2 Output Mode
Bit
7
6
5
4
3
2
1
0
Name
P2MDOUT[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xA6; SFR Page = F
Bit
Name
Function
7:0 P2MDOUT[7:0] Output Configuration Bits for P2.7–P2.0 (respectively).
These bits are ignored if the corresponding bit in register P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
SFR Definition 26.20. P2SKIP: Port 2 Skip
Bit
7
6
5
4
3
2
1
0
Name
P2SKIP[7:0]
Type
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xD6; SFR Page = F
Bit
Name
Function
7:0 P2SKIP[3:0] Port 2 Crossbar Skip Enable Bits.
These bits select Port 2 pins to be skipped by the Crossbar Decoder. Port pins
used for analog, special functions or GPIO should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
184
Rev. 0.3