C8051F70X_0910 Datasheet, PDF (57/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
SFR Definition 8.9. ADC0MX: AMUX0 Channel Select
Bit
7
6
5
4
3
2
1
0
Name
AMX0P[3:0]
Type
R
R
R
R/W
Reset
0
0
0
1
1
1
1
1
SFR Address = 0xBB; SFR Page = 0
Bit
Name
Function
7:5 Unused Read = 0b; Write = Don’t Care.
4:0 AMX0P[4:0] _{AMUX0 Positive Input Selection.}
00000:
00001:
00010:
00011:
00100:
00101:
00110:
00111:
01000
01001
01010
01011
01100
01101
01110
01111
10000:
10001:
10010:
10011:
10100 – 11111:
64-Pin Devices
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
Temp Sensor
VREG Output
VDD
GND
no input selected
48-Pin Devices
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P1.0
P1.1
P1.2
P1.3
Reserved.
Reserved.
Reserved.
Reserved.
Temp Sensor
VREG Output
VDD
GND
Rev. 0.3
57