C8051F70X_0910 Datasheet, PDF (288/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
DOCUMENT CHANGE LIST
Revision 0.2 to Revision 0.3
 Corrected Dimension D in the QFN-48 Package Specifications.
 Updated Table 7.1 on page 39.
 Updated Register 8.1, “ADC0CF: ADC0 Configuration,” on page 50.
 Updated Register 12.3, “CPT0MX: Comparator0 MUX Selection,” on page 71.
 Updated “Port Pins Configured for Analog I/O” on page 166.
 Updated Register 33.2, “DEVICEID: C2 Device ID,” on page 285.
288
Rev. 0.3