C8051F70X_0910 Datasheet, PDF (70/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
12.1. Comparator Multiplexer
C8051F70x/71x devices include an analog input multiplexer to connect Port I/O pins to the comparator
inputs. The Comparator0 inputs are selected in the CPT0MX register (SFR Definition 12.3). The CMX0P2–
CMX0P0 bits select the Comparator0 positive input; the CMX0N2–CMX0N0 bits select the Comparator0
negative input. Important Note About Comparator Inputs: The Port pins selected as comparator inputs
should be configured as analog inputs in their associated Port configuration register, and configured to be
skipped by the Crossbar (for details on Port configuration, see Section “26.6. Special Function Registers
for Accessing and Configuring Port I/O” on page 177).
CPT0MX
P1.0
P1.2
P1.4
P1.6
VDD
CP0 +
+
CP0 - _-
P1.1
P1.3
P1.5
P1.7
GND
Figure 12.3. Comparator Input Multiplexer Block Diagram
70
Rev. 0.3