C8051F70X_0910 Datasheet, PDF (211/290 Pages) Silicon Laboratories – Mixed Signal ISP Flash MCU Family

C8051F70x/71x
of the slave address mask means that bit will be treated as a “don’t care” for comparison purposes. In this
case, either a 1 or a 0 value are acceptable on the incoming slave address. Additionally, if the GC bit in
register SMB0ADR is set to 1, hardware will recognize the General Call Address (0x00). Table 28.4 shows
some example parameter settings and the slave addresses that will be recognized by hardware under
those conditions.
Table 28.4. Hardware Address Recognition Examples (EHACK = 1)
Hardware Slave Address
SLV[6:0]
0x34
0x34
0x34
0x34
0x70
Slave Address Mask
SLVM[6:0]
0x7F
0x7F
0x7E
0x7E
0x73
GC bit
0
1
0
1
0
Slave Addresses Recognized by
Hardware
0x34
0x34, 0x00 (General Call)
0x34, 0x35
0x34, 0x35, 0x00 (General Call)
0x70, 0x74, 0x78, 0x7C
SFR Definition 28.3. SMB0ADR: SMBus Slave Address
Bit
7
6
5
4
3
2
1
0
Name
SLV[6:0]
GC
Type
R/W
R/W
Reset
0
0
0
0
0
0
0
0
SFR Address = 0xBA; SFR Page = F
Bit
Name
Function
7:1
SLV[6:0] SMBus Hardware Slave Address.
Defines the SMBus Slave Address(es) for automatic hardware acknowledgement.
Only address bits which have a 1 in the corresponding bit position in SLVM[6:0]
are checked against the incoming address. This allows multiple addresses to be
recognized.
0
GC
General Call Address Enable.
When hardware address recognition is enabled (EHACK = 1), this bit will deter-
mine whether the General Call Address (0x00) is also recognized by hardware.
0: General Call Address is ignored.
1: General Call Address is recognized.
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