PIC24FJ256DA210 Datasheet, PDF (89/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
REGISTER 6-1: RCON: RESET CONTROL REGISTER⁽¹⁾ (CONTINUED)
bit 2
IDLE: Wake-up From Idle Flag bit
1 = Device has been in Idle mode
0 = Device has not been in Idle mode
bit 1
BOR: Brown-out Reset Flag bit
1 = A Brown-out Reset has occurred
Note that BOR is also set after a Power-on Reset.
0 = A Brown-out Reset has not occurred
bit 0
POR: Power-on Reset Flag bit
1 = A Power-on Reset has occurred
0 = A Power-on Reset has not occurred
Note 1:
2:
3:
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
Re-enabling the regulator after it enters Standby mode will add a delay, TVREG, when waking up from
Sleep. Applications that do not use the voltage regulator should set this bit to prevent this delay from
occurring.
TABLE 6-1: RESET FLAG BIT OPERATION
Flag Bit
Setting Event
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
CM (RCON<9>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
Trap Conflict Event
Illegal Opcode or Uninitialized W Register Access
Configuration Mismatch Reset
MCLR Reset
RESET Instruction
WDT Time-out
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>)
PWRSAV #0 Instruction
PWRSAV #1 Instruction
POR, BOR
POR (RCON<0>)
POR
Note: All Reset flag bits may be set or cleared by the user software.
Clearing Event
POR
POR
POR
POR
POR
CLRWDT, PWRSAV
Instruction, POR
POR
POR
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 2010 Microchip Technology Inc.
DS39969B-page 89