PIC24FJ256DA210 Datasheet, PDF (56/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

TABLE 4-9: OUTPUT COMPARE REGISTER MAP (CONTINUED)
File Name Addr Bit 15 Bit 14 Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
OC8CON1
OC8CON2
OC8RS
OC8R
OC8TMR
OC9CON1
OC9CON2
OC9RS
OC9R
OC9TMR
Legend:
01D6
—
—
OCSIDL OCTSEL2 OCTSEL1 OCTSEL0
01D8 FLTMD FLTOUT FLTTRIEN OCINV
—
DCB1
01DA
01DC
01DE
01E0
—
—
OCSIDL OCTSEL2 OCTSEL1 OCTSEL0
01E2 FLTMD FLTOUT FLTTRIEN OCINV
—
DCB1
01E4
01E6
01E8
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
ENFLT2 ENFLT1 ENFLT0 OCFLT2
DCB0
OC32
OCTRIG TRIGSTAT
Output Compare 8 Secondary Register
Output Compare 8 Register
Output Compare 8 Timer Value Register
ENFLT2 ENFLT1 ENFLT0 OCFLT2
DCB0
OC32
OCTRIG TRIGSTAT
Output Compare 9 Secondary Register
Output Compare 9 Register
Output Compare 9 Timer Value Register
Bit 5
OCFLT1
OCTRIS
OCFLT1
OCTRIS
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
All
Resets
OCFLT0 TRIGMODE OCM2
OCM1
OCM0
SYNCSEL4 SYNCSEL3 SYNCSEL2 SYNCSEL1 SYNCSEL0
0000
000C
0000
OCFLT0 TRIGMODE OCM2
OCM1
OCM0
SYNCSEL4 SYNCSEL3 SYNCSEL2 SYNCSEL1 SYNCSEL0
0000
xxxx
0000
000C
0000
0000
xxxx
TABLE 4-10: I²C™ REGISTER MAP
File
Name
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
I2C2RCV
I2C2TRN
I2C2BRG
I2C2CON
I2C2STAT
I2C2ADD
I2C2MSK
I2C3RCV
I2C3TRN
I2C3BRG
I2C3CON
I2C3STAT
I2C3ADD
I2C3MSK
Legend:
0200
—
—
—
—
—
—
0202
—
—
—
—
—
—
0204
—
—
—
—
—
—
0206
I2CEN
—
I2CSIDL SCLREL IPMIEN A10M
0208 ACKSTAT TRSTAT
—
—
—
BCL
020A
—
—
—
—
—
—
020C
—
—
—
—
—
—
0210
—
—
—
—
—
—
0212
—
—
—
—
—
—
0214
—
—
—
—
—
—
0216
I2CEN
—
I2CSIDL SCLREL IPMIEN A10M
0218 ACKSTAT TRSTAT
—
—
—
BCL
021A
—
—
—
—
—
—
021C
—
—
—
—
—
—
0270
—
—
—
—
—
—
0272
—
—
—
—
—
—
0274
—
—
—
—
—
—
0276
I2CEN
—
I2CSIDL SCLREL IPMIEN A10M
0278 ACKSTAT TRSTAT
—
—
—
BCL
027A
—
—
—
—
—
—
027C
—
—
—
—
—
—
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit 9
Bit 8
—
—
—
DISSLW
GCSTAT
—
—
SMEN
ADD10
—
—
—
DISSLW
GCSTAT
—
—
SMEN
ADD10
—
—
—
DISSLW
GCSTAT
—
—
SMEN
ADD10
Bit 7
GCEN
IWCOL
GCEN
IWCOL
GCEN
IWCOL
Bit 6
Bit 5
Bit 4
Bit 3
I2C1 Receive Register
I2C1 Transmit Register
I2C1 Baud Rate Generator Register
STREN ACKDT ACKEN RCEN
I2COV
D/A
P
S
I2C1 Address Register
I2C1 Address Mask Register
I2C2 Receive Register
I2C2 Transmit Register
I2C2 Baud Rate Generator Register
STREN ACKDT ACKEN RCEN
I2COV
D/A
P
S
I2C2 Address Register
I2C2 Address Mask Register
I2C3 Receive Register
I2C3 Transmit Register
I2C3 Baud Rate Generator Register
STREN ACKDT ACKEN RCEN
I2COV
D/A
P
S
I2C3 Address Register
I2C3 Address Mask Register
Bit 2
PEN
R/W
PEN
R/W
PEN
R/W
Bit 1
RSEN
RBF
RSEN
RBF
RSEN
RBF
Bit 0
SEN
TBF
SEN
TBF
SEN
TBF
All
Resets
0000
00FF
0000
1000
0000
0000
0000
0000
00FF
0000
1000
0000
0000
0000
0000
00FF
0000
1000
0000
0000
0000