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PIC24FJ256DA210 Datasheet, PDF (30/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG) | |||
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PIC24FJ256DA210 FAMILY
TABLE 1-3: PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)
Function
Pin Number
64-Pin
TQFP/QFN
100-Pin
TQFP
121-Pin
BGA
I/O
Input
Buffer
Description
RP20
53
82
B8
I/O ST
RP21
4
10
E3
I/O ST
RP22
51
78
B9
I/O ST
RP23
50
77
A10
I/O ST
RP24
49
76
A11
I/O ST
RP25
RP26
52
81
C8
I/O ST
Remappable Peripheral (input or output).
5
11
F4
I/O ST
RP27
8
14
F3
I/O ST
RP28
12
21
H2
I/O ST
RP29
30
44
L8
I/O ST
RP30
â
52
K11
I/O ST
RP31
â
39
L6
I/O ST
RPI32
â
40
K6
I
ST
RPI33
â
18
G1
I
ST
RPI34
â
19
G2
I
ST
RPI35
â
67
E8
I
ST
RPI36
â
66
E11
I
ST
RPI37
48
74
B11
I
ST
Remappable Peripheral (input only).
RPI38
â
6
D1
I
ST
RPI39
â
7
E4
I
ST
RPI40
â
8
E2
I
ST
RPI41
â
9
E1
I
ST
RPI42
â
79
A9
I
ST
RPI43
â
47
L9
I
ST
RTCC
42
68
E9
O
â Real-Time Clock Alarm/Seconds Pulse Output.
SCL1
44
66
E11
I/O I2C⢠I2C1 Synchronous Serial Clock Input/Output.
SCL2
32
58
H11
I/O I2C I2C2 Synchronous Serial Clock Input/Output.
SCL3
2
4
C1
I/O I2C I2C3 Synchronous Serial Clock Input/Output.
SCLKI
48
74
B11
O ANA Secondary Clock Input.
SDA1
43
67
E8
I/O I2C I2C1 Data Input/Output.
SDA2
31
59
G10
I/O I2C I2C2 Data Input/Output.
SDA3
3
5
D2
I/O I2C I2C3 Data Input/Output.
SESSEND
55
84
C7
I
ST USB VBUS Boost Generator, Comparator Input 3.
SESSVLD
59
88
A6
I
ST USB VBUS Boost Generator, Comparator Input 2.
SOSCI
47
73
C10
I ANA Secondary Oscillator/Timer1 Clock Input.
SOSCO
48
74
B11
O ANA Secondary Oscillator/Timer1 Clock Output.
T1CK
48
74
B11
I
ST Timer1 Clock.
Legend: TTL = TTL input buffer
ANA = Analog level input/output
ST = Schmitt Trigger input buffer
I2C⢠= I2C/SMBus input buffer
Note 1:
2:
3:
4:
The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to â0â.
The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.
The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.
The alternate VREF pins selected when the ALTVREF (CW1<5>) bit is programmed to â0â.
DS39969B-page 30
ï£ 2010 Microchip Technology Inc.
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