English
Language : 

PIC24FJ256DA210 Datasheet, PDF (328/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)
PIC24FJ256DA210 FAMILY
REGISTER 23-2: AD1CON2: A/D CONTROL REGISTER 2
R/W-0
R/W-0
R/W-0
r-0
VCFG2
VCFG1
VCFG0
r
bit 15
U-0
R/W-0
U-0
—
CSCNA
—
U-0
—
bit 8
R-0, HSC
BUFS
bit 7
R/W-0
SMPI4
R/W-0
SMPI3
R/W-0
SMPI2
R/W-0
SMPI1
R/W-0
SMPI0
R/W-0
BUFM
R/W-0
ALTS
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
HSC = Hardware Settable/Clearable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6-2
bit 1
bit 0
VCFG<2:0>: Voltage Reference Configuration bits
VCFG<2:0>
000
001
010
011
1xx
VR+
AVDD
External VREF+ pin
AVDD
External VREF+ pin
AVDD
VR-
AVSS
AVSS
External VREF- pin
External VREF- pin
AVSS
Reserved: Maintain as ‘0’
Unimplemented: Read as ‘0’
CSCNA: Scan Input Selections for the CH0+ S/H Input for MUX A Input Multiplexer Setting bit
1 = Scan inputs
0 = Do not scan inputs
Unimplemented: Read as ‘0’
BUFS: Buffer Fill Status bit (valid only when BUFM = 1)
1 = A/D is currently filling buffer, 10-1F, user should access data in 00-0F
0 = A/D is currently filling buffer, 00-0F, user should access data in 10-1F
SMPI<4:0>: Sample/Convert Sequences Per Interrupt Selection bits
11111 = Interrupts at the completion of conversion for each 32nd sample/convert sequence
11110 = Interrupts at the completion of conversion for each 31st sample/convert sequence
.
.
.
00001 = Interrupts at the completion of conversion for each 2nd sample/convert sequence
00000 = Interrupts at the completion of conversion for each sample/convert sequence
BUFM: Buffer Mode Select bit
1 = Buffer is configured as two 16-word buffers (ADC1BUFn<31:16> and ADC1BUFn<15:0>)
0 = Buffer is configured as one 32-word buffer (ADC1BUFn<31:0>)
ALTS: Alternate Input Sample Mode Select bit
1 = Uses MUX A input multiplexer settings for the first sample, then alternates between MUX B and
MUX A input multiplexer settings for all subsequent samples
0 = Always uses the MUX A input multiplexer settings
DS39969B-page 328
 2010 Microchip Technology Inc.