PIC24FJ256DA210 Datasheet, PDF(31/408 Page) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

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PIC24FJ256DA210 Datasheet, PDF (31/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

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PIC24FJ256DA210 FAMILY

TABLE 1-3: PIC24FJ256DA210 FAMILY PINOUT DESCRIPTIONS (CONTINUED)

Function

Pin Number

64-Pin

TQFP/QFN

100-Pin

TQFP

121-Pin

BGA

I/O

Input

Buffer

Description

TCK

TDI

TDO

TMS

USBID

USBOEN

VBUS

VBUSCHG

VBUSON

VBUSST

VBUSVLD

VCAP

VCMPST1

VCMPST2

VCPCON

VDD

VMIO

VPIO

VREF-

VREF+

VSS

VSYNC

VUSB

Legend:

Note 1:

2:

3:

4:

27

38

J6

I

ST JTAG Test Clock Input.

28

60

G11

I

ST JTAG Test Data Input.

24

61

G9

O

â JTAG Test Data Output.

23

17

G3

I

ST JTAG Test Mode Select Input.

33

51

K10

I

ST USB OTG ID (OTG mode only).

12

21

H2

O

â USB Output Enable Control (for external transceiver).

34

54

H8

I

ANA USB Voltage, Host mode (5V).

49

76

A11

O

â External USB VBUS Charge Output.

11

20

H1

O

â USB OTG External Charge Pump Control.

58

87

B6

I

ANA USB OTG Internal Charge Pump Feedback Control.

58

87

B6

I

ST USB VBUS Boost Generator, Comparator Input 1.

56

85

B7

P

â External Filter Capacitor Connection (regulator enabled).

58

87

B6

I

ST USB VBUS Boost Generator, Comparator Input 1.

59

88

A6

I

ST USB VBUS Boost Generator, Comparator Input 2.

49

76

A11

O

â USB OTG VBUS PWM/Charge Output.

10, 26, 38

2, 16, 37, C2, C9, F8, P

46, 62 G5, H6, K8,

H4, E5

â Positive Supply for Peripheral Digital Logic and I/O Pins.

14

23

J2

I

ST USB Differential Minus Input/Output (external transceiver).

13

22

J1

I

ST USB Differential Plus Input/Output (external transceiver).

15

28, 24(4)

L2, K1(4)

I

ANA A/D and Comparator Reference Voltage (low) Input.

16

29, 25(4)

K3, K2(4)

I

ANA A/D and Comparator Reference Voltage (high) Input.

9, 25, 41

15, 36, 45, B10, F5, P

65, 75

F10, G6,

G7, H3, D4,

D5

â Ground Reference for Logic and I/O Pins.

1

96

C3

O

â Graphics Display Vertical Sync Pulse.

35

55

H9

P

â USB Voltage (3.3V).

TTL = TTL input buffer

ANA = Analog level input/output

ST = Schmitt Trigger input buffer

I2Câ¢ = I2C/SMBus input buffer

The alternate EPMP pins are selected when the ALTPMP (CW3<12>) bit is programmed to â0â.

The PMSC2 signal will replace the PMA15 signal on the 15-pin PMA when CSF<1:0> = 01 or 10.

The PMCS1 signal will replace the PMA14 signal on the 14-pin PMA when CSF<1:0> = 10.

The alternate VREF pins selected when the ALTVREF (CW1<5>) bit is programmed to â0â.

ï£ 2010 Microchip Technology Inc.

DS39969B-page 31

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