PIC24FJ256DA210 Datasheet, PDF (314/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
REGISTER 22-12: G1W2ADRH: GPU WORK AREA 2 START ADDRESS REGISTER HIGH
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0
W2ADR23
bit 7
R/W-0
W2ADR22
R/W-0
W2ADR21
R/W-0
W2ADR20
R/W-0
W2ADR19
R/W-0
W2ADR18
R/W-0
W2ADR17
R/W-0
W2ADR16
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-8
bit 7-0
Unimplemented: Read as ‘0’
W2ADR<23:16>: GPU Work Area 2 Start Address High bits
Work area address must point to an even byte address in memory.
REGISTER 22-13: G1PUW: GPU WORK AREA WIDTH REGISTER
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
PUW10
bit 15
R/W-0
PUW9
R/W-0
PUW8
bit 8
R/W-0
PUW7
bit 7
R/W-0
PUW6
R/W-0
PUW5
R/W-0
PUW4
R/W-0
PUW3
R/W-0
PUW2
R/W-0
PUW1
R/W-0
PUW0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-11
bit 10-0
Unimplemented: Read as ‘0’
PUW<10:0>: GPU Work Area Width bits (in pixels)
REGISTER 22-14: G1PUH: GPU WORK AREA HEIGHT REGISTER
U-0
U-0
U-0
U-0
U-0
R/W-0
—
—
—
—
—
PUH10
bit 15
R/W-0
PUH9
R/W-0
PUH8
bit 8
R/W-0
PUH7
bit 7
R/W-0
PUH6
R/W-0
PUH5
R/W-0
PUH4
R/W-0
PUH3
R/W-0
PUH2
R/W-0
PUH1
R/W-0
PUH0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-11
bit 10-0
Unimplemented: Read as ‘0’
PUH<10:0>: GPU Work Area Height bits (in pixels)
DS39969B-page 314
 2010 Microchip Technology Inc.