PIC24FJ256DA210 Datasheet, PDF (312/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
REGISTER 22-8: G1IR: GFX INTERRUPT STATUS REGISTER
R/W-0, HS
U-0
U-0
U-0
U-0
U-0
U-0
PUIF
—
—
—
—
—
—
bit 15
U-0
—
bit 8
R/W-0, HS
IPUIF⁽¹⁾
bit 7
R/W-0, HS
RCCIF⁽¹⁾
R/W-0, HS
CHRIF⁽¹⁾
R/W-0, HS
VMRGNIF
R/W-0, HS
HMRGNIF
R/W-0, HS
CMDLVIF
R/W-0, HS
CMDFULIF
R/W-0, HS
CMDMPTIF
bit 0
Legend:
R = Readable bit
-n = Value at POR
HS = Hardware Settable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PUIF: Processing Units Complete Interrupt Flag bit
PUIF is an ORed combination of IPUIF, RCCIF and CHRIF.
1 = One or more PUs completed command execution (must be cleared in software)
0 = All PUs are Idle or busy completing command execution
Unimplemented: Read as ‘0’
IPUIF: Inflate Processing Unit Complete Interrupt Flag bit⁽¹⁾
1 = IPU completed command execution (must be cleared in software)
0 = IPU is Idle or busy completing command execution
RCCIF: Rectangle Copy Graphics Processing Unit Complete Interrupt Flag bit⁽¹⁾
1 = RCCGPU completed command execution (must be cleared in software)
0 = RCCGPU is Idle or busy completing command execution
CHRIF: Character Graphics Processing Unit Complete Interrupt Flag bit⁽¹⁾
1 = CHRGPU completed command execution (must be cleared in software)
0 = CHRGPU is Idle or busy completing command execution
VMRGNIF: Vertical Blanking Interrupt Flag bit
1 = Display interface is in the vertical blanking period (must be cleared in software)
0 = Display interface is not in the vertical blanking period
HMRGNIF: Horizontal Blanking Interrupt Flag bit
1 = Display interface is in the horizontal blanking period (must be cleared in software)
0 = Display interface is not in the horizontal blanking period
CMDLVIF: Command Watermark Interrupt Flag bit
1 = Command watermark level is reached (must be cleared in software)
0 = Command watermark level is not yet reached
CMDFULIF: Command FIFO Full Interrupt Flag bit
1 = Command FIFO is full (must be cleared in software)
0 = Command FIFO is not full
CMDMPTIF: Command FIFO Empty Interrupt Flag bit
1 = Command FIFO is empty (must be cleared in software)
0 = Command FIFO is not empty
Note 1: The logic of each Processing Unit Status bit is the reverse of the PUIF. This provides flexibility on software
code utilizing the processing units.
DS39969B-page 312
 2010 Microchip Technology Inc.