PIC24FJ256DA210 Datasheet, PDF (76/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
TABLE 4-36: PROGRAM SPACE ADDRESS CONSTRUCTION
Access Type
Access
Space
Program Space Address
<23>
<22:16>
<15>
<14:1>
<0>
Instruction Access
(Code Execution)
TBLRD/TBLWT
(Byte/Word Read/Write)
User
User
Configuration
0
PC<22:1>
0
0xx xxxx xxxx xxxx xxxx xxx0
TBLPAG<7:0>
Data EA<15:0>
0xxx xxxx
TBLPAG<7:0>
xxxx xxxx xxxx xxxx
Data EA<15:0>
Program Space Visibility User
(Block Remap/Read)
1xxx xxxx
xxxx xxxx xxxx xxxx
0
DSRPAG<7:0>⁽²⁾
Data EA<14:0>⁽¹⁾
0
xxxx xxxx
xxx xxxx xxxx xxxx
Note 1: Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
the address is DSRPAG<0>.
2: DSRPAG<9> is always ‘1’ in this case. DSRPAG<8> decides whether the lower word or higher word of
program memory is read. When DSRPAG<8> is ‘0’, the lower word is read and when it is ‘1’, the higher
word is read.
FIGURE 4-8:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
Program Counter
0
Program Counter
0
23 Bits
Table Operations⁽²⁾
1/0
TBLPAG
8 Bits
EA
1/0
16 Bits
24 Bits
Program Space Visibility⁽¹⁾
(Remapping)
0
1-Bit
Select
1
DSRPAG<7:0>
8 Bits
EA
1/0
15 Bits
23 Bits
User/Configuration
Space Select
Byte Select
Note 1:
2:
DSRPAG<8> acts as word select. DSRPAG<9> should always be ‘1’ to map program memory to data memory.
The instructions, TBLRDH/TBLWTH/TBLRDL/TBLWTL, decide if the higher or lower word of program memory is
accessed. TBLRDH/TBLWTH instructions access the higher word and TBLRDL/TBLWTL instructions access the
lower word. Table read operations are permitted in the configuration memory space.
DS39969B-page 76
 2010 Microchip Technology Inc.