PIC24FJ256DA210 Datasheet, PDF (335/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
24.0 TRIPLE COMPARATOR
MODULE
Note:
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
associated “PIC24F Family Reference
Manual”.
The triple comparator module provides three dual input
comparators. The inputs to the comparator can be
configured to use any one of five external analog inputs
(CxINA, CxINB, CxINC, CxIND and VREF+) and a
voltage reference input from one of the internal band
gap references or the comparator voltage reference
generator (VBG, VBG/2, VBG/6 and CVREF).
The comparator outputs may be directly connected to
the CxOUT pins. When the respective COE equals ‘1’,
the I/O pad logic makes the unsynchronized output of
the comparator available on the pin.
A simplified block diagram of the module in shown in
Figure 24-1. Diagrams of the possible individual
comparator configurations are shown in Figure 24-2.
Each comparator has its own control register,
CMxCON (Register 24-1), for enabling and configuring
its operation. The output and event status of all three
comparators is provided in the CMSTAT register
(Register 24-2).
FIGURE 24-1:
TRIPLE COMPARATOR MODULE BLOCK DIAGRAM
CCH<1:0>
CXINB
CXINC
CXIND
VBG
VBG/2
VBG/6
VREF+
Input
Select
Logic
00
01
10
00
11
01
10
11
CVREFM<1:0>⁽¹⁾
VIN-
VIN+ ^C1
-
VIN-
VIN+ ^C2
EVPOL<1:0>
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C1OUT
COUT
Pin
EVPOL<1:0>
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C2OUT
COUT
Pin
CXINA
VREF+
CVREF
CVREFP⁽¹⁾
0
+
0
1
1
VIN-
VIN+ ^C3
CREF
Note 1: Refer Register 25-1 for bit details.
EVPOL<1:0>
CPOL
Trigger/Interrupt
Logic
CEVT
COE
C3OUT
COUT
Pin
 2010 Microchip Technology Inc.
DS39969B-page 335