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PIC24FJ256DA210 Datasheet, PDF (193/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)
PIC24FJ256DA210 FAMILY
FIGURE 12-2:
T2CK
(T4CK)
TIMER2 AND TIMER4 (16-BIT SYNCHRONOUS) BLOCK DIAGRAM
TON
1x
TCKPS<1:0>
2
Gate
Sync
Prescaler
01
1, 8, 64, 256
TGATE
1
Set T2IF (T4IF)
0
TCY
QD
Q CK
Reset
TMR2 (TMR4)
00
TCS(1)
TGATE(1)
Sync
Equal
Comparator
PR2 (PR4)
Note 1: The timer clock input must be assigned to an available RPn/RPIn pin before use. See Section 10.4 “Peripheral
Pin Select (PPS)” for more information.
FIGURE 12-3:
TIMER3 AND TIMER5 (16-BIT ASYNCHRONOUS) BLOCK DIAGRAM
T3CK
(T5CK)
Sync
TON
1x
01
TCKPS<1:0>
2
Prescaler
1, 8, 64, 256
TGATE
1
Set T3IF (T5IF)
0
TCY
QD
Q CK
Reset
TMR3 (TMR5)
ADC Event Trigger(2)
Equal
Comparator
00
TCS(1)
TGATE(1)
PR3 (PR5)
Note 1:
2:
The timer clock input must be assigned to an available RPn/RPIn pin before use. See Section 10.4 “Peripheral
Pin Select (PPS)” for more information.
The ADC event trigger is available only on Timer3.
 2010 Microchip Technology Inc.
DS39969B-page 193