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PIC24FJ256DA210 Datasheet, PDF (401/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)
PIC24FJ256DA210 FAMILY
K
Key Features..................................................................... 347
CTMU........................................................................ 343
EPMP........................................................................ 273
RTCC ........................................................................ 285
M
Memory Organization.......................................................... 45
Microchip Internet Web Site .............................................. 405
MPLAB ASM30 Assembler, Linker, Librarian ................... 360
MPLAB Integrated Development
Environment Software............................................... 359
MPLAB PM3 Device Programmer .................................... 362
MPLAB REAL ICE In-Circuit Emulator System................. 361
MPLINK Object Linker/MPLIB Object Librarian ................ 360
N
Near Data Space ................................................................ 49
O
Oscillator Configuration
96 MHz PLL .............................................................. 149
Clock Selection ......................................................... 142
Clock Switching......................................................... 148
Sequence.......................................................... 148
CPU Clocking Scheme ............................................. 142
Display Clock Frequency Division............................. 152
Initial Configuration on POR ..................................... 142
USB Operations ........................................................ 151
Output Compare
32-Bit Mode............................................................... 201
Synchronous and Trigger Modes.............................. 201
Output Compare with Dedicated Timers ........................... 201
P
Packaging ......................................................................... 387
Details ....................................................................... 388
Marking ..................................................................... 387
Peripheral Enable Bits ...................................................... 156
Peripheral Module Disable Bits ......................................... 156
Peripheral Pin Select (PPS) .............................................. 164
Available Peripherals and Pins ................................. 164
Configuration Control ................................................ 167
Considerations for Use ............................................. 168
Input Mapping ........................................................... 164
Mapping Exceptions.................................................. 167
Output Mapping ........................................................ 166
Peripheral Priority ..................................................... 164
Registers................................................................... 169
Pin Descriptions
100-Pin Devices............................................................ 8
121 (BGA)-Pin Devices............................................... 11
64-Pin Devices.............................................................. 6
Pin Diagrams
100-Pin TQFP ............................................................... 7
121-Pin BGA ............................................................... 10
64-Pin TQFP/QFN ........................................................ 5
Pinout Descriptions ............................................................. 21
POR
and On-Chip Voltage Regulator................................ 354
Power-Saving
Clock Frequency and Clock Switching...................... 155
Features.................................................................... 155
Instruction-Based Modes .......................................... 155
Power-up Requirements ................................................... 355
Product Identification System ........................................... 407
Program Memory
Access Using Table Instructions ................................ 77
Address Construction ................................................. 75
Address Space ........................................................... 45
Flash Configuration Words ......................................... 46
Memory Maps............................................................. 45
Organization ............................................................... 46
Reading From Program Memory Using EDS ............. 78
Pulse-Width Modulation (PWM) Mode.............................. 203
Pulse-Width Modulation. See PWM.
PWM
Duty Cycle and Period.............................................. 204
R
Reader Response............................................................. 406
Reference Clock Output ................................................... 152
Register Maps
A/D Converter............................................................. 61
ANCFG ....................................................................... 64
ANSEL........................................................................ 64
Comparators............................................................... 66
CPU Core ................................................................... 50
CRC............................................................................ 66
CTMU ......................................................................... 62
Enhanced Parallel Master/Slave Port ......................... 65
Graphics ..................................................................... 69
I2C™........................................................................... 56
ICN ............................................................................. 51
Input Capture.............................................................. 54
Interrupt Controller...................................................... 52
NVM............................................................................ 70
Output Compare ......................................................... 55
Pad Configuration....................................................... 60
Peripheral Pin Select .................................................. 67
PMD............................................................................ 70
PORTA ....................................................................... 58
PORTB ....................................................................... 58
PORTC ....................................................................... 59
PORTD ....................................................................... 59
PORTE ....................................................................... 59
PORTF ....................................................................... 60
PORTG....................................................................... 60
RTCC.......................................................................... 65
SPI.............................................................................. 58
System........................................................................ 70
Timers......................................................................... 53
UART.......................................................................... 57
USB OTG ................................................................... 63
Registers
AD1CHS (A/D Input Select)...................................... 330
AD1CON1 (A/D Control 1)........................................ 327
AD1CON2 (A/D Control 2)........................................ 328
AD1CON3 (A/D Control 3)........................................ 329
AD1CSSH (A/D Input Scan Select, High)................. 332
AD1CSSL (A/D Input Scan Select, Low) .................. 331
ALCFGRPT (Alarm Configuration) ........................... 289
ALMINSEC (Alarm Minutes and Seconds Value)..... 293
ALMTHDY (Alarm Month and Day Value) ................ 292
ALWDHR (Alarm Weekday and Hours Value) ......... 293
ANCFG (A/D Band Gap Reference
Configuration) ................................................... 331
ANSA (PORTA Analog Function Selection) ............. 159
ANSB (PORTB Analog Function Selection) ............. 160
ANSC (PORTC Analog Function Selection) ............. 160
ANSD (PORTD Analog Function Selection) ............. 161
ANSE (PORTE Analog Function Selection) ............. 161
 2010 Microchip Technology Inc.
DS39969B-page 401