PIC24FJ256DA210 Datasheet, PDF (350/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
REGISTER 27-2: CW2: FLASH CONFIGURATION WORD 2
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 23
bit 16
R/PO-1
IESO
bit 15
R/PO-1
PLLDIV2
R/PO-1
PLLDIV1
R/PO-1
PLLDIV0
R/PO-1
PLL96MHZ
R/PO-1
FNOSC2
R/PO-1
FNOSC1
R/PO-1
FNOSC0
bit 8
R/PO-1
FCKSM1
bit 7
R/PO-1
FCKSM0
R/PO-1
OSCIOFCN
R/PO-1
IOL1WAY
r-1
reserved
r-1
reserved
R/PO-1
POSCMD1
R/PO-1
POSCMD0
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = Reserved bit
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 23-16
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
bit 5
Unimplemented: Read as ‘1’
IESO: Internal External Switchover bit
1 = IESO mode (Two-Speed Start-up) is enabled
0 = IESO mode (Two-Speed Start-up) is disabled
PLLDIV<2:0>: 96 MHz PLL Prescaler Select bits
111 = Oscillator input is divided by 12 (48 MHz input)
110 = Oscillator input is divided by 8 (32 MHz input)
101 = Oscillator input is divided by 6 (24 MHz input)
100 = Oscillator input is divided by 5 (20 MHz input)
011 = Oscillator input is divided by 4 (16 MHz input)
010 = Oscillator input is divided by 3 (12 MHz input)
001 = Oscillator input is divided by 2 (8 MHz input)
000 = Oscillator input is used directly (4 MHz input)
PLL96MHZ: 96 MHz PLL Start-Up Enable bit
1 = 96 MHz PLL is enabled automatically on start-up
0 = 96 MHz PLL is software controlled (can be enabled by setting the PLLEN bit in CLKDIV<5>)
FNOSC<2:0>: Initial Oscillator Select bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Reserved
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
FCKSM<1:0>: Clock Switching and Fail-Safe Clock Monitor Configuration bits
1x = Clock switching and Fail-Safe Clock Monitor are disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
OSCIOFCN: OSCO Pin Configuration bit
If POSCMD<1:0> = 11 or 00:
1 = OSCO/CLKO/RC15 functions as CLKO (FOSC/2)
0 = OSCO/CLKO/RC15 functions as port I/O (RC15)
If POSCMD<1:0> = 10 or 01:
OSCIOFCN has no effect on OSCO/CLKO/RC15.
DS39969B-page 350
 2010 Microchip Technology Inc.