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| PIC24FJ256DA210 Datasheet, PDF (48/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG) | |||
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PIC24FJ256DA210 FAMILY
4.2.1 DATA SPACE WIDTH
The data memory space is organized in
byte-addressable, 16-bit wide blocks. Data is aligned
in data memory and registers as 16-bit words, but all
data space EAs resolve to bytes. The Least Significant
Bytes (LSBs) of each word have even addresses, while
the Most Significant Bytes (MSBs) have odd
addresses.
FIGURE 4-3:
DATA SPACE MEMORY MAP FOR PIC24FJ256DA210 FAMILY DEVICES(4)
MSB
Address
0001h
07FFh
0801h
1FFFh
2001h
MSB
LSB
SFR Space
LSB
Address
0000h
07FEh
0800h
1FFEh
2000h
SFR
Space
Near
Data Space
Lower 32 Kbytes
Data Space
67FFh(1)
30 Kbytes Data RAM
67FEh(1)
7FFFh
8001h
Upper 32 Kbytes
Data Space
FFFFh
EDS Window
7FFEh
8000h
EDS Page 0x1
(32 KB)
EDS Page 0x2
(32 KB)
EDS Page 0x3 (2 KB)
Internal Extended
Data RAM(66 Kbytes)(2)
FFFEh
EDS Page 0x4
EDS Page 0x1FF
EDS Page 0x200
EDS Page 0x2FF
EDS Page 0x300
EDS Page 0x3FF
EPMP Memory Space(3)
Program Space Visibility
Area to Access Lower
Word of Program Memory
Program Space Visibility
Area to Access Upper
Word of Program Memory
Note 1:
2:
3:
4:
24-Kbyte RAM variants (PIC24FJXXXDA1XX devices have implemented RAM only up to 0x67FF).
Valid only for 96-Kbyte RAM variants (PIC24FJXXXDA2XX).
Valid only for variants with the EPMP module (PIC24FJXXXDAX10).
Data memory areas are not shown to scale.
DS39969B-page 48
ï£ 2010 Microchip Technology Inc.
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