PIC24FJ256DA210 Datasheet, PDF (249/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
18.3.1 CLEARING USB OTG INTERRUPTS
Unlike device level interrupts, the USB OTG interrupt
status flags are not freely writable in software. All USB
OTG flag bits are implemented as hardware set only
bits. Additionally, these bits can only be cleared in
software by writing a ‘1’ to their locations (i.e., perform-
ing a MOV type instruction). Writing a ‘0’ to a flag bit (i.e.,
a BCLR instruction) has no effect.
Note:
Throughout this data sheet, a bit that can
only be cleared by writing a ‘1’ to its loca-
tion is referred to as “Write 1 to clear”. In
register descriptions, this function is
indicated by the descriptor, “K”.
FIGURE 18-10: EXAMPLE OF A USB TRANSACTION AND INTERRUPT EVENTS
USB Reset
URSTIF
Start-Of-Frame (SOF)
SOFIF
From Host From Host To Host
SETUP Token Data
ACK
From Host To Host From Host
IN Token
Data
ACK
From Host From Host
OUT Token Empty Data
Transaction
To Host
ACK
Set TRNIF
Set TRNIF
Set TRNIF
Transaction
Complete
RESET
Differential Data
SOF
SETUP DATA STATUS
Control Transfer⁽¹⁾
SOF
1 ms Frame
Note 1: The control transfer shown here is only an example showing events that can occur for every transaction. Typical
control transfers will spread across multiple frames.
18.4 Device Mode Operation
The following section describes how to perform a com-
mon Device mode task. In Device mode, USB transfers
are performed at the transfer level. The USB module
automatically performs the status phase of the transfer.
18.4.1 ENABLING DEVICE MODE
1. Reset the Ping-Pong Buffer Pointers by setting,
then clearing, the Ping-Pong Buffer Reset bit,
PPBRST (U1CON<1>).
2. Disable all interrupts (U1IE and U1EIE = 00h).
3. Clear any existing interrupt flags by writing FFh
to U1IR and U1EIR.
4. Verify that VBUS is present (non OTG devices
only).
5. Enable the USB module by setting the USBEN
bit (U1CON<0>).
6. Set the OTGEN bit (U1OTGCON<2>) to enable
OTG operation.
7. Enable the endpoint zero buffer to receive the
first setup packet by setting the EPRXEN and
EPHSHK bits for Endpoint 0 (U1EP0<3,0> = 1).
8. Power up the USB module by setting the
USBPWR bit (U1PWRC<0>).
9. Enable the D+ pull-up resistor to signal an attach
by setting DPPULUP bit (U1OTGCON<7>).
 2010 Microchip Technology Inc.
DS39969B-page 249