PIC24FJ256DA210 Datasheet, PDF (276/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
REGISTER 19-2: PMCON2: EPMP CONTROL REGISTER 2
R-0, HSC
U-0
BUSY
—
bit 15
R/C-0, HS
ERROR
R/C-0, HS
TIMEOUT
R-0, HSC
AMREQ
R-1, HSC
CURMST
R/W-0
MSTSEL1
R/W-0
MSTSEL0
bit 8
R/W-0
RADDR23
bit 7
R/W-0
RADDR22
R/W-0
RADDR21
R/W-0
RADDR20
R/W-0
RADDR19
R/W-0
RADDR18
R/W-0
RADDR17
R/W-0
RADDR16
bit 0
Legend:
R = Readable bit
-n = Value at POR
HS = Hardware Settable bit
W = Writable bit
‘1’ = Bit is set
HSC = Hardware Settable/Clearable bit
U = Unimplemented bit, read as ‘0’ C = Clearable bit
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7-0
BUSY: Busy bit (Master mode only)
1 = Port is busy
0 = Port is not busy
Unimplemented: Read as ‘0’
ERROR: Error bit
1 = Transaction error (illegal transaction was requested)
0 = Transaction completed successfully
TIMEOUT: Time-Out bit
1 = Transaction timed out
0 = Transaction completed successfully
AMREQ: Alternate Master Request bit
1 = The Alternate Master is requesting use of EPMP
0 = The Alternate Master is not requesting use of EPMP
CURMST: Current Master bit
1 = EPMP access is granted to CPU
0 = EPMP access is granted to alternate master
MSTSEL<1:0>: Parallel Port Master Select bits
11 = Alternate master I/Os direct access (EPMP Bypass mode)
10 = Reserved
01 = Alternate master
00 = CPU
RADDR<23:16>: Parallel Master Port Reserved Address Space bits⁽¹⁾
Note 1: If RADDR<23:16> = 00000000, then the last EDS address for Chip Select 2 will be 0xFFFFFF.
DS39969B-page 276
 2010 Microchip Technology Inc.