PIC24FJ256DA210 Datasheet, PDF (381/408 Pages) Microchip Technology – 64/100-Pin, 16-Bit Flash Microcontrollers with Graphics Controller and USB On-The-Go (OTG)

PIC24FJ256DA210 FAMILY
TABLE 30-13: EXTERNAL CLOCK TIMING REQUIREMENTS
AC CHARACTERISTICS
Standard Operating Conditions: 2.2V to 3.6V (unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
Param
No.
Symbol
Characteristic
Min
Typ⁽¹⁾
Max
Units
Conditions
OS10 FOSC External CLKI Frequency
DC
(External clocks allowed
4
only in EC mode)
—
32
MHz EC
—
48
MHz ECPLL
Oscillator Frequency
3.5
—
10
MHz XT
4
—
8
MHz XTPLL
10
—
32
MHz HS
10
—
32
MHz HSPLL
31
—
33
kHz SOSC
OS20 TOSC TOSC = 1/FOSC
OS25 TCY
Instruction Cycle Time⁽²⁾
—
62.5
—
—
— See parameter OS10 for
FOSC value
—
DC
ns
OS30 TosL, External Clock in (OSCI) 0.45 x TOSC —
—
ns EC
TosH High or Low Time
OS31 TosR, External Clock in (OSCI)
—
TosF Rise or Fall Time
OS40 TckR CLKO Rise Time⁽³⁾
—
OS41 TckF CLKO Fall Time⁽³⁾
—
—
20
ns EC
6
10
ns
6
10
ns
Note 1: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
2: Instruction cycle period (TCY) equals two times the input oscillator time base period. All specified values are
based on characterization data for that particular oscillator type under standard operating conditions with
the device executing code. Exceeding these specified limits may result in an unstable oscillator operation
and/or higher than expected current consumption. All devices are tested to operate at “Min.” values with an
external clock applied to the OSCI/CLKI pin. When an external clock input is used, the “Max.” cycle time
limit is “DC” (no clock) for all devices.
3: Measurements are taken in EC mode. The CLKO signal is measured on the OSCO pin. CLKO is low for the
Q1-Q2 period (1/2 TCY) and high for the Q3-Q4 period (1/2 TCY).
TABLE 30-14: PLL CLOCK TIMING SPECIFICATIONS (VDD = 2.2V TO 3.6V)
AC CHARACTERISTICS
Standard Operating Conditions: 2.2V to 3.6V (unless otherwise stated)
Operating temperature -40°C  TA  +85°C for Industrial
Param
No.
Symbol
Characteristic⁽¹⁾
Min
Typ⁽²⁾
Max
Units
Conditions
OS50 FPLLI PLL Input Frequency
4
—
48
MHz ECPLL mode
Range⁽²⁾
4
32
MHz HSPLL mode
4
8
MHz XTPLL mode
OS51 FSYS PLL Output Frequency 95.76
—
96.24 MHz
Range
OS52 TLOCK PLL Start-up Time
(Lock Time)
—
—
200
s
OS53 DCLK CLKO Stability (Jitter)
-0.25
—
0.25
%
Note 1: These parameters are characterized but not tested in manufacturing.
2: Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
 2010 Microchip Technology Inc.
DS39969B-page 381