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S9S12G128F0CLF Datasheet, PDF (461/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual | |||
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14.3.2.12.1 Left Justiï¬ed Result Data (DJM=0)
Analog-to-Digital Converter (ADC12B16CV2)
Module Base +
0x0010 = ATDDR0, 0x0012 = ATDDR1, 0x0014 = ATDDR2, 0x0016 = ATDDR3
0x0018 = ATDDR4, 0x001A = ATDDR5, 0x001C = ATDDR6, 0x001E = ATDDR7
0x0020 = ATDDR8, 0x0022 = ATDDR9, 0x0024 = ATDDR10, 0x0026 = ATDDR11
0x0028 = ATDDR12, 0x002A = ATDDR13, 0x002C = ATDDR14, 0x002E = ATDDR15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
Result-Bit[11:0]
W
0
0
0
0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-14. Left justiï¬ed ATD conversion result register (ATDDRn)
Table 14-21 shows how depending on the A/D resolution the conversion result is transferred to the ATD
result registers for left justiï¬ed data. Compare is always done using all 12 bits of both the conversion result
and the compare value in ATDDRn.
Table 14-21. Conversion result mapping to ATDDRn
A/D
resolution
DJM
conversion result mapping to ATDDRn
8-bit data 0
Result-Bit[11:4] = conversion result,
Result-Bit[3:0]=0000
10-bit data 0
Result-Bit[11:2] = conversion result,
Result-Bit[1:0]=00
12-bit data 0 Result-Bit[11:0] = result
14.3.2.12.2 Right Justiï¬ed Result Data (DJM=1)
Module Base +
0x0010 = ATDDR0, 0x0012 = ATDDR1, 0x0014 = ATDDR2, 0x0016 = ATDDR3
0x0018 = ATDDR4, 0x001A = ATDDR5, 0x001C = ATDDR6, 0x001E = ATDDR7
0x0020 = ATDDR8, 0x0022 = ATDDR9, 0x0024 = ATDDR10, 0x0026 = ATDDR11
0x0028 = ATDDR12, 0x002A = ATDDR13, 0x002C = ATDDR14, 0x002E = ATDDR15
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
0
0
W
Result-Bit[11:0]
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-15. Right justiï¬ed ATD conversion result register (ATDDRn)
MC9S12G Family Reference Manual, Rev.1.10
Freescale Semiconductor
461
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