S9S12G128F0CLF Datasheet, PDF (220/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

5V Analog Comparator (ACMPV1)
3.6.2 Register Descriptions
3.6.2.1 ACMP Control Register (ACMPC)
Address 0x0260
R
W
Reset
7
ACIE
0
1 _{Read: Anytime}
Write: Anytime
6
ACOPE
5
ACICE
4
ACDIEN
3
ACMOD1
2
ACMOD0
0
0
0
0
0
Figure 3-3. ACMP Control Register (ACMPC)
Access: User read/write¹
1
0
0
ACE
0
0
Table 3-2. ACMPC Register Field Descriptions
Field
7
ACIE
ACMP Interrupt Enable—
Enables the ACMP interrupt.
Description
0 Interrupt disabled
1 Interrupt enabled
6
ACMP Output Pin Enable—
ACOPE Enables raw comparator output on external ACMPO pin.
5
ACICE
0 ACMP output not available
1 ACMP output is driven out on ACMPO
ACMP Input Capture Enable—
Establishes internal link to a timer input capture channel. When enabled, the associated timer pin is disconnected
from the timer input. Refer to ACE description to account for initialization delay on this path.
0 Timer link disabled
1 ACMP output connected to input capture channel 5
4
ACMP Digital Input Buffer Enable—
ACDIEN Enables the input buffers on ACMPP and ACMPM for the pins to be used with digital functions.
Note: If this bit is set while simultaneously using the pin as an analog port, there is potentially increased power
consumption because the digital input buffer may be in the linear region.
0 Input buffers disabled on ACMPP and ACMPM
1 Input buffers enabled on ACMPP and ACMPM
MC9S12G Family Reference Manual, Rev.1.10
220
Freescale Semiconductor