S9S12G128F0CLF Datasheet, PDF (117/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

Chapter 2
Port Integration Module (S12GPIMV1)
Revision History
Rev. No.
(Item No.)
V00.53
Date
(Submitted By)
13 Oct 2010
V01.00
18 Oct 2010
Sections
Affected
Substantial Change(s)
• Reworked interrupt section
•
• Initial version
V01.01
V01.02
01 Dec 2010
30 Aug 2011
Table 2-4
Table 2-5
Table 2-8
Table 2-16
Table 2-17
• Removed TXD2 and RXD2 from PM1 and PM0 for G64
• Simplified input buffer control description on port C and AD
• Corrected DAC signal priorities on pins PAD10 and PAD11 with shared
AMP and DACU output functions
2.4.3.40/2-192
2.4.3.48/2-198
2.4.3.63/2-207
2.4.3.64/2-208
• Corrected PIFx descriptions
2.1 Introduction
This section describes the S12G-family port integration module (PIM) in its configurations depending on
the family devices in their available package options.
It is split up into two parts, firstly determining the routing of the various signals to the available package
pins (“PIM Routing”) and secondly describing the general-purpose port related logic (“PIM Ports”).
2.1.1 Glossary
Term
Pin
Signal
Port
Table 2-1. Glossary Of Terms
Definition
Package terminal with a unique number defined in the device pinout section
Input or output line of a peripheral module or general-purpose I/O function arbitrating
for a dedicated pin
Group of general-purpose I/O pins sharing peripheral signals
MC9S12G Family Reference Manual, Rev.1.10
Freescale Semiconductor
117