S9S12G128F0CLF Datasheet, PDF (384/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

Analog-to-Digital Converter (ADC10B8CV2)
Table 11-15. Analog Input Channel Select Coding
SC
CD
CC
CB
CA
0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
X
X
Analog Input
Channel
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
AN7
Internal_6,
Internal_7
Internal_0
Internal_1
VRH
VRL
(VRH+VRL) / 2
Reserved
Internal_2
Internal_3
Internal_4
Internal_5
Reserved
11.3.2.7 ATD Status Register 0 (ATDSTAT0)
This register contains the Sequence Complete Flag, overrun flags for external trigger and FIFO mode, and
the conversion counter.
MC9S12G Family Reference Manual, Rev.1.10
384
Freescale Semiconductor