S9S12G128F0CLF Datasheet, PDF (1079/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

Electrical Characteristics
A.3.1 Measurement Conditions
Run current is measured on VDDR pin. It does not include the current to drive external loads. Unless
otherwise noted the currents are measured in special single chip mode and the CPU code is executed from
RAM. For Run and Wait current measurements PLL is on and the reference clock is the IRC1M trimmed
to 1MHz. The bus frequency is 25MHz and the CPU frequency is 50MHz. Table A-8., Table A-9. and
Table A-10. show the configuration of the CPMU module and the peripherals for Run, Wait and Stop
current measurement.
Table A-8. CPMU Configuration for Pseudo Stop Current Measurement
CPMU REGISTER
CPMUCLKS
CPMUOSC
CPMURTI
CPMUCOP
Bit settings/Conditions
PLLSEL=0, PSTP=1,
PRE=PCE=RTIOSCSEL=COPOSCSEL=1
OSCE=1, External Square wave on EXTAL f_EXTAL=4MHz,
V_IH= 1.8V, V_IL=0V
RTDEC=0, RTR[6:4]=111, RTR[3:0]=1111;
WCOP=1, CR[2:0]=111
Table A-9. CPMU Configuration for Run/Wait and Full Stop Current Measurement
CPMU REGISTER
Bit settings/Conditions
CPMUSYNR
VCOFRQ[1:0]=01,SYNDIV[5:0] = 24
CPMUPOSTDIV POSTDIV[4:0]=0
CPMUCLKS
PLLSEL=1
CPMUOSC
OSCE=0,
Reference clock for PLL is f_ref=f_irc1m trimmed to 1MHz
API settings for STOP current measurement
CPMUAPICTL APIEA=0, APIFE=1, APIE=0
CPMUAPITR
trimmed to 10Khz
CPMUAPIRH/RL set to $FFFF
Freescale Semiconductor
MC9S12G Family Reference Manual, Rev.1.10
1079