S9S12G128F0CLF Datasheet, PDF (1068/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

Electrical Characteristics
A.1.1 Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate.
NOTE
This classification is shown in the column labeled “C” in the parameter
tables where appropriate.
P: Those parameters are guaranteed during production testing on each individual device.
C: Those parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
T: Those parameters are achieved by design characterization on a small sample size from typical
devices under typical conditions unless otherwise noted. All values shown in the typical column
are within this category.
D: Those parameters are derived mainly from simulations.
A.1.2 Power Supply
The VDDA, VSSA pin pairs supply the A/D converter and parts of the internal voltage regulator.
The VDDX, VSSX pin pairs [3:1] supply the I/O pins.
VDDR supplies the internal voltage regulator.
The VDDF, VSS1 pin pair supplies the internal NVM logic.
All VDDX pins are internally connected by metal.
All VSSX pins are internally connected by metal.
VDDA, VDDX and VSSA, VSSX are connected by diodes for ESD protection.
NOTE
In the following context V_DD35 is used for either VDDA, VDDR, and
VDDX; V_SS35 is used for either VSSA and VSSX unless otherwise noted.
I_DD35 denotes the sum of the currents flowing into the VDDA, VDDX and
VDDR pins.
A.1.3 Pins
There are four groups of functional pins.
A.1.3.1 I/O Pins
The I/O pins have a level in the range of 3.13V to 5.5V. This class of pins is comprised of all port I/O pins,
the analog inputs, BKGD and the RESET pins. Some functionality may be disabled.
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MC9S12G Family Reference Manual, Rev.1.10
Freescale Semiconductor