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S9S12G128F0CLF Datasheet, PDF (1099/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual | |||
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t = 500 â
f--N----V---M-1---B---U---S-
Electrical Characteristics
A.7.1.13 Set Field Margin Level (FCMD=0x0E)
The maximum set ï¬eld margin level time is given by:
t = 510 â
f--N----V---M-1---B---U---S-
A.7.1.14 Erase Verify EEPROM Section (FCMD=0x10)
The time required to Erase Verify EEPROM for a given number of words NW is given by:
tdcheck â (520 + NW) â
f--N----V---M-1---B---U---S-
A.7.1.15 Program EEPROM (FCMD=0x11)
EEPROM programming time is dependent on the number of words being programmed and their location
with respect to a row boundary since programming across a row boundary requires extra steps.
The typical EEPROM programming time is given by the following equation, where NW denotes the
number of words:
tdpgm
â
â
â
(
34
â
NW)
â
-f-N----V--1-M----O---P--
â
â
+
â
â
(
600
+
( 940
â
NW))
â
-f-N----V---M-1---B---U---S-
â
â
The maximum EEPROM programming time is given by:
tdpgm
â
ââ ( 34
â
NW)
â
f--N----V--1-M----O---P--
â
â
+
ââ ( 600
+
( 1020
â
NW ))
â
f--N----V---M-1---B---U---S-
â
â
A.7.1.16 Erase EEPROM Sector (FCMD=0x12)
Typical EEPROM sector erase times, expected on a new device where no margin verify fails occur, is given
by:
tdera â 5025 â
f--N----V--1-M----O---P-- + 710 â
f--N----V---M-1---B---U---S-
Freescale Semiconductor
MC9S12G Family Reference Manual, Rev.1.10
1099
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