S9S12G128F0CLF Datasheet, PDF (327/1158 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual

S12 Clock, Reset and Power Management Unit (S12CPMU)
The COP will continue to run on ACLK.
The clock configuration bits PLLSEL, COPOSCSEL0, RTIOSCSEL are unchanged.
NOTE
When starting up the external oscillator (either by programming OSCE bit
to 1 or on exit from Full Stop Mode with OSCE bit already 1) the software
must wait for a minimum time equivalent to the startup-time of the external
oscillator t_UPOSC before entering Pseudo Stop Mode.
MC9S12G Family Reference Manual, Rev.1.10
Freescale Semiconductor
327