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| K4Y50164UC Datasheet, PDF (7/76 Pages) Samsung semiconductor – 512Mbit XDR TM DRAM(C-die) | |||
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K4Y50164UC
K4Y50084UC
K4Y50044UC
K4Y50024UC
XDRTM DRAM
The following table shows the pin assignment of 512Mb x8 XDR DRAM Package. The mechanical dimensions of this package are
shown on page 72. Note - Pin #1 is at the A1 postion.
Table 1-2 : x8 Package Pinout(Top View) : 104ball FBGA Package
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Top View
RSRV
RSRV
DQ6
DQN6
VDD
GND
DQ0
DQN0
RSRV
RSRV
GND
VTERM
SDO
RST
GND
VDD
GND
GND
VDD
RSRV
RSRV
DQ2
DQN2
A
GND
VDD
DQ4
DQN4
RSRV
RSRV
B
VTERM
GND
RQ0
GND
SDI
C
VDD
RQ2
RQ1
VDD
VDD
RQ3
RQ4
VDD
D
GND
RQ5
VREF
GND
VDD
RSRV
RSRV
GND
E
VDD
GND
GND
VDD
F
VDD
RQ6
RQ7
VDD
VDD
RQ8
RQ9
GND
GND
SCK
CMD
VDD
GND
DQ1
DQN1
RSRV
RSRV
GND
VTERM
RSRV
RSRV
DQ7
DQN7
VDD
GND
GND
CFMN
CFM
VDD
G
GND
RQ11
RQ10
GND
H
VTERM
GND
VDD
VDD
VDD
J
GND
VDD
DQ5
DQN5
RSRV
RSRV
K
GND
VDD
RSRV
RSRV
DQ3
DQN3
L
ROW
COL
SSAAMMSUSNUGNG 520404001
KK44YYR55001016874UUMC - PJCCCB43
The pin #1(ROW1, COLA) is located at the A1
position on the top side and the A1 position is
marked by the marker â â.
7 of 76
Top View
Chip
Rev. 1.1 August 2006
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