K4Y50164UC Datasheet, PDF (15/76 Pages) Samsung semiconductor – 512Mbit XDR TM DRAM(C-die)

K4Y50164UC
K4Y50084UC
K4Y50044UC
K4Y50024UC
XDR^TM DRAM
7.2 Request Field Encoding
Operation code fields are encoded within different packet types to specify commands. Table4 through Table7 provides packet type and
encoding summaries.
Table4 shows the OP field encoding for five packet types. The COLM and ROWA packets each specify a single command : ACT and
WRM. The COL, COLX, and ROWP packets each use additional fields to specify multiple commands : WRX, XOP, and POP/ROP,
respectively. The COLM packet specifies the masked write command WRM. This is like the WR unmasked write command, except that
a mask field M7...0 indicates whether each byte of the write data packet is written or not written. The ROWA packet specifies the row
activate command ACT. The COL packet uses the WRX field to specify the column read and column write(unmasked) commands.
Table 4 : OP Field Encoding Summary
OP [3:0] Packet Command
Description
0000
0001
0010
0011
01xx
1xxx
-
NOP
No operation.
RD
COL
WR
Column read (WRX=0). Column C9..4 of sense amp in bank BC2..0 is read to DQ bus after
DELC*t_CYCLE.
Column write (WRX=1). Write DQ bus to column C9..4 of sense amp in bank BC2..0 after
DELC*t_CYCLE.
COLX CALy
XOP3..0 specifies a calibrate or powerdown command — see Table 7 on page 16.
PREx
POP2..0 specifies a row precharge command — see Table 6 on page 16.
ROWP
REFy,LRRr
ROP2..0 specifies a row refresh command or load REFr register command — see Table 5
on page 15.
ROWA ACT
Row activate command. Row R11..0 of bank BA2..0 is placed into the sense amp of the
bank after DELA*t_CYCLE.
COLM WRM
Column write command (masked) — mask M7..0 specifies which bytes are written.
Encoding of the ROP field in the ROWP packet is shown in Table5. The first encoding specifies a NOPR (no operation) command. The
REFP command uses the RA field to select a bank to be precharged. The REFA and REFI commands use the RA field and REFH/M/L
registers to select a bank and row to be activated for refresh. The REFI command also increments the REFH/M/L register. The REFP,
REFA, and REFI commands may also be delayed by up to 3*t_CYCLE using the RA[7:6] field. The LRR0, LRR1, and LRR2 commands
load the REFH/M/L registers from the RA[7:0] field.
Table 5 : ROP Field Encoding Summary
ROP[2:0] Command
Description
000
NOPR No operation
001
REFP
Refresh precharge command. Bank RA2..0 is precharged.
This command is delayed by {0,1,2,3}*t_CYCLE (the value is given by the expression (2*RA[7]+RA[6]).
Refresh activate command. Row R[11:0] (from REFH/M/L register) of bank RA2..0 is placed into
010
REFA sense amp.
This command is delayed by {0,1,2,3}*t_CYCLE (the value is given by the expression (2*RA[7]+RA[6]).
Refresh activate command. Row R[11:0] (from REFH/M/L register) of bank RA2..0 is placed into
011
REFI
sense amp.
This command is delayed by {0,1,2,3}*t_CYCLE (the value is given by the expression (2*RA[7]+RA[6]).
R[11:0] field of REFH/M/L register is incremented after the activate command has completed.
100
LRR0 Load Refresh Low Row register (REFL). RA[7:0] is stored in R[7:0] field.
101
LRR1 Load Refresh Middle Row register (REFM). RA[3:0] is stored in R[11:8] field.
110
LRR2 Load Refresh High Row register — not used with this device.
111
-
Reserved
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Rev. 1.1 August 2006